Historically, basic cells of such computing memory arrays were custom designed, to allow for high performance. However, such approach does not take advantage of the huge technological progress achieved in the area of standard RAM in recent years.
The present invention relates to sum-of-products function of an input vector and a multitude of stored vectors (also known as a compare function) and also relates to arrays which implement quantity compare and majority logic. In particular the present invention relates to methods and circuits for the application of standard Static Random Access Memories (SRAM) as the basic building blocks for arrays which determine if unmasked bits of an input vector are identical to a multitude of stored vectors, where such arrays can also be utilized to the evaluation of magnitude/quantity compare and majority logic functions between bits of stored vectors.
Provisional Applications U.S. 60/948,743: “Methods and Circuits for the Utilization of Standard and Slightly Modified RAM cells as Sum-of-Products Evaluation Arrays”, U.S. 60/948,744: “Novel Computing Memory Architecture”, and U.S. 60/973,183: “Methods and Circuits for the Utilization of Standard and Slightly Modified SRAM Cells as Arrays for Concurrent Evaluation of Quanti-ty-Compare, Majority and Compare Functions”, are incorporated herein in entirety as reference to the present invention.